Many systems employ soft start function for the systems to smoothly start up when system power on to reduce the impact during the start up and to prevent overloading to some components and overvoltage in the systems. FIG. 1 is a simplified diagram of a conventional pulse width modulation (PWM) buck converter 100 with soft start function, in which two switches SW1 and SW2 connected in series between supply voltage Vcc and ground GND are switched by signals CTL and SYN, respectively, to convert the input voltage Vcc to an output voltage Vo for loads Load1 and Load2, sample, and hold unit 102 produces feedback signal VFB from the output voltage Vo, error amplifier 106 has an inverting input connected with the feedback signal VFB and a non-inverting input connected with a reference signal Vr or a ramp signal SS_Ramp from multiplexer 104, multiplexer 108 selects between the output of the error amplifier 106 and ramp signal SS_Ramp, comparator 112 has an inverting input connected with a ramp 110 and a non-inverting input connected with the output of the multiplexer 108, to produce the signals CTL and SYN, and enable signal EN enables the error amplifier 106 and the comparator 112 for the converter 100 to operate.
FIG. 2 is a waveform diagram of various signals in the converter 100 of FIG. 1 during a soft start period, in which waveforms 114 and 116 represent the output voltage Vo, waveform 118 represents the ramp signal SS_Ramp, waveforms 120 and 121 represent the feedback signal VFB, and waveform 122 represents the enable signal EN. Referring to FIGS. 1 and 2, when the enable signal EN transits from low level to high level as shown by the waveform 122, the error amplifier 106 and the comparator 112 are enabled, and thus the non-inverting input of the error amplifier 106 receives the ramp signal SS_Ramp from the multiplexer 104. Generally speaking, when the converter 100 begins to start up, the output voltage Vo will be zero as shown by the waveform 116, and during the soft start period, the output voltage Vo begins to rise up toward a target level. However, due to the residual charges on the output Vo of the converter 100 resulted from the previous operation, the output voltage Vo may have a nonzero initial level as shown by the waveform 114, and thus the feedback signal VFB will be greater than the ramp signal SS_Ramp as shown by the waveforms 121 and 118. In this case, the converter 100 will first release the residual charges on the output Vo to pull down the output voltage Vo until the feedback signal VFB becomes lower than the ramp signal SS_Ramp, and therefore the residual charges on the output Vo are wasted.
U.S. Pat. No. 6,841,977 to Huang et al. discloses a soft start circuit that maintains the low-side switch at off state until the output voltage reaches a target level so as to remain the residual voltage on the output. However, such circuit can be only applied to buck PWM converter. Solie proposes a soft start circuit in U.S. Pub. No. 2004/0228152, which first charges a soft start capacitor by the residual charges on the converter output before enabling the converter such that on the soft start capacitor and the converter output will have a same voltage, and then uses the voltage on the capacitor as a reference voltage to be compared with the voltage on the converter output when enabling the converter. By this way, it will not require to release to the residual voltage on the converter output. However, this art needs an extra capacitor, and the ramp signal for the output voltage to first compare is an RC discharge curve, which is disadvantageous to the soft start performance.
Therefore, it is desired a soft start circuit and method without requiring to release the residual voltage, without requiring extra component, and with wider application range.